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Reusable and scalable verification environment for memory controllers

Abburi, Kiran Kumar and Evani, Siva Subrahmanya and Thomas, Sajeev and Aprem, Anup

Progress in VLSI Design and Test: 16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedings · pp. 209-216 · 2012

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Cite this work

Abburi, Kiran Kumar and Evani, Siva Subrahmanya and Thomas, Sajeev and Aprem, Anup (2012). Reusable and scalable verification environment for memory controllers. Progress in VLSI Design and Test: 16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedings, 209-216

Other citation formats
IEEE

Abburi, Kiran Kumar and Evani, Siva Subrahmanya and Thomas, Sajeev and Aprem, Anup, “Reusable and scalable verification environment for memory controllers,” Progress in VLSI Design and Test: 16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedings, pp. 209-216, 2012.

MLA

Abburi, Kiran Kumar and Evani, Siva Subrahmanya and Thomas, Sajeev and Aprem, Anup. “Reusable and scalable verification environment for memory controllers.” Progress in VLSI Design and Test: 16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedings, 2012, pp. 209-216.

Chicago

Abburi, Kiran Kumar and Evani, Siva Subrahmanya and Thomas, Sajeev and Aprem, Anup. “Reusable and scalable verification environment for memory controllers.” Progress in VLSI Design and Test: 16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedings (2012): 209-216.

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